View ICL3232EIV-16Z-T_828056.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 ? fn4910.18 icl3221e, icl3222e, icl3223e, icl3232e, icl3241e, icl3243e 15kv esd protected, +3v to +5.5v, 1microamp, 250kbps, rs-232 transmitters/receivers the intersil icl32xxe devices are 3.0v to 5.5v powered rs-232 transmitters/receivers which meet ela/tia-232 and v.28/v.24 specifications, even at v cc = 3.0v. additionally, they provide 15kv esd protection (iec61000-4-2 air gap and human body model) on transmitter outputs and receiver inputs (rs-232 pins). targeted applications are pdas, palmtops, and notebook and laptop computers where the low operational, and even lower standby, power consumption is critical. efficient on-chip charge pumps, coupled with manual and automatic powerdown functions (except for the icl3232e), reduce the standby supply current to a 1a trickle. sm all footprint packaging, and the use of small, low value capacitors ensure board space savings as well. data rates greater than 250kbps are guaranteed at worst case load c onditions. this family is fully compatible with 3.3v-only systems, mixed 3.3v and 5.0v systems, and 5.0v-only systems. the icl324xe are 3-driver, 5-re ceiver devices that provide a complete serial port suitable for laptop or notebook computers. both devices also include noninverting always- active receivers for ?wake-up? capability. the icl3221e, icl3223e and icl3243e, feature an automatic powerdown function which powers down the on- chip power-supply and driver circuits. this occurs when an attached peripheral device is shut off or the rs-232 cable is removed, conserving system power automatically without changes to the hardware or operating system. these devices power up again when a valid rs-232 voltage is applied to any receiver input. table 1 summarizes the features of the devices represented by this data sheet, while application note an9863 summarizes the features of ea ch device comprising the icl32xxe 3v family. features ? pb-free available (rohs compliant) (see ordering info) ? esd protection for rs-232 i/o pins to 15kv (iec61000) ? drop in replacements for max3221e, max3222e, max3223e, max3232e, max3241e, max3243e, sp3243e ? icl3221e is a low power, pin compatible upgrade for 5v max221e ? icl3222e is a low power, pin compatible upgrade for 5v max242e, and sp312e ? icl3232e is a low power upgrade for hin232e, icl232 and pin compatible competitor devices ? rs-232 compatible with v cc = 2.7v ? meets eia/tia-232 and v.28/v .24 specifications at 3v ? latch-up free ? on-chip voltage converters require only four external 0.1f capacitors ? manual and automatic powerdown features ? guaranteed mouse driveability (icl324xe only) ? receiver hysteresis for improved noise immunity ? guaranteed minimum data rate . . . . . . . . . . . . . 250kbps ? wide power supply range . . . . . . . single +3v to +5.5v ? low supply current in powerdow n state. . . . . . . . . . .1a applications ? any system requiring rs-232 communication ports - battery powered, hand-held, and portable equipment - laptop computers, notebooks, palmtops - modems, printers and other peripherals - digital cameras - cellular/mobile phones related literature ? technical brief tb363 ?guidelines for handling and processing moisture sensit ive surface mount devices (smds)? table 1. summary of features part number no. of tx. no. of rx. no. of monitor rx. (r outb ) data rate (kbps) rx. enable function? ready output? manual power- down? automatic powerdown function? icl3221e 1 1 0 250 yes no yes yes icl3222e 2 2 0 250 yes no yes no icl3223e 2 2 0 250 yes no yes yes icl3232e 2 2 0 250 no no no no icl3241e 3 5 2 250 yes no yes no icl3243e 3 5 1 250 no no yes yes data sheet march 8, 2005 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a trademark of intersil americas inc. copyright intersil americas inc. 2000-2005. all rights reserved. all other trademarks mentioned are the property of their respective owners.
2 fn4910.18 march 8, 2005 ordering information (note 1) part no. temp. (c) package pkg. dwg. # icl3221eca 0 to 70 16 ld ssop m16.209 icl3221ecaz (note 2) 0 to 70 16 ld ssop (pb-free) m16.209 icl3221ecaza (note 2) 0 to 70 16 ld ssop (pb-free) m16.209 icl3221ecv 0 to 70 16 ld tssop m16.173 icl3221ecvz (note 2) 0 to 70 16 ld tssop (pb-free) m16.173 icl3221eia -40 to 85 16 ld ssop m16.209 icl3221eiaz (note 2) -40 to 85 16 ld ssop (pb-free) m16.209 icl3221eiv -40 to 85 16 ld tssop m16.173 icl3221eivz (note 2) -40 to 85 16 ld tssop (pb-free) m16.173 icl3222eca 0 to 70 20 ld ssop m20.209 icl3222ecaz (note 2) 0 to 70 20 ld ssop (pb-free) m20.209 icl3222ecp 0 to 70 18 ld pdip e18.3 icl3222ecv 0 to 70 20 ld tssop m20.173 icl3222ecvz (note 2) 0 to 70 20 ld tssop (pb-free) m20.173 icl3222eia -40 to 85 20 ld ssop m20.209 icl3222eiaz (note 2) -40 to 85 20 ld ssop (pb-free) m20.209 icl3222eib -40 to 85 18 ld soic m18.3 icl3222eibz (note 2) -40 to 85 18 ld soic (pb-free) m18.3 icl3222eiv -40 to 85 20 ld tssop m20.173 icl3222eivz (note 2) -40 to 85 20 ld tssop (pb-free) m20.173 icl3223eca 0 to 70 20 ld ssop m20.209 icl3223ecaz (note 2) 0 to 70 20 ld ssop (pb-free) m20.209 icl3223ecv 0 to 70 20 ld tssop m20.173 icl3223ecvz (note 2) 0 to 70 20 ld tssop (pb-free) m20.173 icl3223eia -40 to 85 20 ld ssop m20.209 icl3223eiaz (note 2) -40 to 85 20 ld ssop (pb-free) m20.209 icl3223eiv -40 to 85 20 ld tssop m20.173 icl3223eivz (note 2) -40 to 85 20 ld tssop (pb-free) m20.173 icl3232eca 0 to 70 16 ld ssop m16.209 icl3232ecaz (note 2) 0 to 70 16 ld ssop (pb-free) m16.209 icl3232ecb 0 to 70 16 ld soic m16.3 icl3232ecbz (note 2) 0 to 70 16 ld soic (pb-free) m16.3 icl3232ecbn 0 to 70 16 ld soic (n) m16.15 icl3232ecbnz (note 2) 0 to 70 16 ld soic (n) (pb-free) m16.15 icl3232ecv-16 0 to 70 16 ld tssop m16.173 icl3232ecv-16z (note 2) 0 to 70 16 ld tssop (pb-free) m16.173 icl3232ecv-20 0 to 70 20 ld tssop m20.173 icl3232ecv-20z (note 2) 0 to 70 20 ld tssop (pb-free) m20.173 icl3232eia -40 to 85 16 ld ssop m16.209 icl3232eiaz (note 2) -40 to 85 16 ld ssop (pb-free) m16.209 icl3232eib -40 to 85 16 ld soic m16.3 icl3232eibz (note 2) -40 to 85 16 ld soic (pb-free) m16.3 icl3232eibnz (note 2) -40 to 85 16 ld soic (n) (pb-free) m16.15 icl3232eiv-16 -40 to 85 16 ld tssop m16.173 icl3232eiv-16z (note 2) -40 to 85 16 ld tssop (pb-free) m16.173 icl3232eiv-20 -40 to 85 20 ld tssop m20.173 icl3232eiv-20z (note 2) -40 to 85 20 ld tssop (pb-free) m20.173 icl3241eca 0 to 70 28 ld ssop m28.209 icl3241ecaz (note 2) 0 to 70 28 ld ssop (pb-free) m28.209 icl3241ecb 0 to 70 28 ld soic m28.3 icl3241ecbz (note 2) 0 to 70 28 ld soic (pb-free) m28.3 icl3241ecv 0 to 70 28 ld tssop m28.173 icl3241ecvz (note 2) 0 to 70 28 ld tssop (pb-free) m28.173 icl3241eia -40 to 85 28 ld ssop m28.209 icl3241eiaz (note 2) -40 to 85 28 ld ssop (pb-free) m28.209 icl3241eib -40 to 85 28 ld soic m28.3 icl3241eibz (note 2) -40 to 85 28 ld soic (pb-free) m28.3 icl3241eiv -40 to 85 28 ld tssop m28.173 icl3241eivz (note 2) -40 to 85 28 ld tssop (pb-free) m28.173 icl3243eca 0 to 70 28 ld ssop m28.209 icl3243ecaz (note 2) 0 to 70 28 ld ssop (pb-free) m28.209 icl3243ecb 0 to 70 28 ld soic m28.3 icl3243ecbz (note 2) 0 to 70 28 ld soic (pb-free) m28.3 icl3243ecv 0 to 70 28 ld tssop m28.173 icl3243ecvza (note 2) 0 to 70 28 ld tssop (pb-free) m28.173 icl3243ecvz (note 2) 0 to 70 28 ld tssop (pb-free) m28.173 icl3243eia -40 to 85 28 ld ssop m28.209 icl3243eiaz (note 2) -40 to 85 28 ld ssop (pb-free) m28.209 icl3243eiv -40 to 85 28 ld tssop m28.173 icl3243eivz (note 2) -40 to 85 28 ld tssop (pb-free) m28.173 notes: 1. most surface mount devices are available on tape and reel; add ?-t? to suffix. 2. intersil pb-free products employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. ordering information (continued) (note 1) part no. temp. (c) package pkg. dwg. # icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
3 fn4910.18 march 8, 2005 pinouts icl3221e (ssop, tssop) top view icl3222e (pdip, soic) top view icl3222e (ssop, tssop) top view icl3223e (ssop, tssop) top view icl3232e (soic, ssop, tssop-16) top view icl3232e (tssop-20) top view en c1+ v+ c1- c2+ c2- v- r1 in forceoff gnd t1 out forceon t1 in r1 out v cc invalid 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 en c1+ v+ c1- c2+ c2- v- t2 out r2 in shdn gnd t1 out r1 in r1 out t2 in v cc t1 in r2 out 18 17 16 15 14 13 12 11 10 1 2 3 4 5 6 7 8 9 en c1+ v+ c1- c2+ c2- v- t2 out r2 in shdn gnd t1 out r1 in r1 out t1 in nc v cc nc t2 in 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 r2 out en c1+ v+ c1- c2+ c2- v- t2 out r2 in forceoff gnd t1 out r1 in r1 out t1 in invalid v cc forceon t2 in 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 r2 out c1+ v+ c1- c2+ c2- v- t2 out r2 in v cc t1 out r1 in r1 out t1 in r2 out gnd t2 in 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 nc c1+ v+ c1- c2+ c2- v- t2 out r2 in nc gnd t1 out r1 in r1 out t1 in nc v cc t2 in 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 nc r2 out icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
4 fn4910.18 march 8, 2005 icl3241e (soic, ssop, tssop) top view icl3243e (soic, ssop, tssop) top view pinouts (continued) c2+ c2- v- r1 in r2 in r3 in r4 in r5 in t1 out t3 out t3 in t2 in t1 in c1+ v cc gnd c1- en r1 outb r1 out r2 out r3 out r4 out r5 out v+ shdn r2 outb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 t2 out c2+ c2- v- r1 in r2 in r3 in r4 in r5 in t1 out t3 out t3 in t2 in t1 in c1+ v cc gnd c1- forceon invalid r1 out r2 out r3 out r4 out r5 out v+ forceoff r2 outb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 t2 out pin descriptions pin function v cc system power supply input (3.0v to 5.5v). v+ internally generated positiv e transmitter supply (+5.5v). v- internally generated negative transmitter supply (-5.5v). gnd ground connection. c1+ external capacitor (voltage doubl er) is connected to this lead. c1- external capacitor (voltage doubl er) is connected to this lead. c2+ external capacitor (voltage in verter) is connected to this lead. c2- external capacitor (voltage in verter) is connected to this lead. t in ttl/cmos compatible transmitter inputs. t out 15kv esd protected , rs-232 level (nominally 5.5v) transmitter outputs. r in 15kv esd protected , rs-232 compatible receiver inputs. r out ttl/cmos level receiver outputs. r outb ttl/cmos level, noninverting, always enabled receiver outputs. invalid active low output that indicates if no valid rs -232 levels are present on any receiver input. en active low receiver enable control; doesn?t disable r outb outputs. shdn active low input to shut down transmitters and on-boar d power supply, to place device in low power mode. forceoff active low to shut down transmitters and on-chip power supply. this overrides any automatic ci rcuitry and forceon (see table 2) . forceon active high input to override automatic powerdown ci rcuitry thereby keeping transmitters active. (forceoff must be high). icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
5 fn4910.18 march 8, 2005 typical operating circuits icl3221e icl3222e 15 v cc t1 out t1 in t 1 0.1f + 0.1f + 0.1f 11 13 2 4 3 7 v+ v- c1+ c1- c2+ c2- + 0.1f 5 6 r1 out r1 in r 1 8 9 5k ? c 1 c 2 + c 3 c 4 en 1 gnd +3.3v + 0.1f 14 ttl/cmos logic levels rs-232 levels forceon forceoff 12 16 v cc 10 invalid to power control logic + c 3 (optional connection, note) note: the negative terminal of c 3 can be connected to either v cc or gnd 17 v cc t1 out t2 out t1 in t2 in t 1 t 2 0.1f + 0.1f + 0.1f 12 11 15 8 2 4 3 7 v+ v- c1+ c1- c2+ c2- + 0.1f 5 6 r1 out r1 in 14 5k ? r2 out r2 in 9 10 5k ? 13 c 1 c 2 + c 3 c 4 en shdn 1 gnd 18 +3.3v + 0.1f 16 v cc ttl/cmos logic levels rs-232 levels r 1 r 2 + c 3 (optional conne ction, note) note: the negative terminal of c 3 can be connected to either v cc or gnd icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
6 fn4910.18 march 8, 2005 icl3223e icl3232e typical operating circuits (continued) 19 v cc t1 out t2 out t1 in t2 in t 1 t 2 0.1f + 0.1f + 0.1f 13 12 17 8 2 4 3 7 v+ v- c1+ c1- c2+ c2- + 0.1f 5 6 r1 out r1 in 16 5k ? r2 out r2 in 9 10 5k ? 15 c 1 c 2 + c 3 c 4 en 1 gnd +3.3v + 0.1f 18 ttl/cmos logic levels rs-232 levels r 1 r 2 forceon forceoff 14 20 v cc 11 invalid to power control logic 16 v cc t1 out t2 out t1 in t2 in t 1 t 2 0.1f + 0.1f + 0.1f 11 10 14 7 1 3 2 6 v+ v- c1+ c1- c2+ c2- + 0.1f 4 5 r1 out r1 in 13 5k ? r2 out r2 in 8 9 5k ? 12 c 1 c 2 + c 3 c 4 gnd +3.3v + 0.1f 15 ttl/cmos logic levels rs-232 levels r 1 r 2 + c 3 (optional connection, note) note: the negative terminal of c 3 can be connected to either v cc or gnd icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
7 fn4910.18 march 8, 2005 icl3241e icl3243e typical operating circuits (continued) 26 v cc t1 out t2 out t3 out t1 in t2 in t3 in t 1 t 2 t 3 0.1f + 0.1f + 0.1f 14 13 9 10 12 11 28 24 27 3 v+ v- c1+ c1- c2+ c2- + 0.1f 1 2 r1 out r1 in 4 5k ? r2 out r2 in 5 18 5k ? r3 out r3 in 6 17 5k ? r4 out r4 in 7 16 5k ? r5 out r5 in r 5 8 15 5k ? 19 r2 outb c 1 c 2 + c 3 c 4 en shdn 23 gnd 22 +3.3v + 0.1f 20 25 v cc ttl/cmos logic rs-232 levels rs-232 levels r1 outb 21 r 1 r 2 r 3 r 4 levels 26 v cc t1 out t2 out t3 out t1 in t2 in t3 in t 1 t 2 t 3 0.1f + 0.1f + 0.1f 14 13 9 10 12 11 28 24 27 3 v+ v- c1+ c1- c2+ c2- + 0.1f 1 2 r1 out r1 in 4 5k ? r2 out r2 in 5 18 5k ? r3 out r3 in 6 17 5k ? r4 out r4 in 7 16 5k ? r5 out r5 in r 5 8 15 5k ? 19 r2 outb c 1 c 2 + c 3 c 4 forceon forceoff 23 gnd 22 +3.3v + 0.1f 20 25 v cc ttl/cmos logic rs-232 levels rs-232 levels r 1 r 2 r 3 r 4 21 invalid to power control levels logic icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
8 fn4910.18 march 8, 2005 absolute maximum rati ngs thermal information v cc to ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6v v+ to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 7v v- to ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3v to -7v v+ to v- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14v input voltages t in , forceoff , forceon, en , shdn . . . . . . . . . -0.3v to 6v r in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25v output voltages t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2v r out , invalid . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to v cc +0.3v short circuit duration t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous esd rating . . . . . . . . . . . . . . . . . . . . . . . . . see specification table operating conditions temperature range icl32xxecx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0c to 70c icl32xxeix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40c to 85c thermal resistance (typical, note 3) ja (c/w) 18 ld pdip package . . . . . . . . . . . . . . . . . . . . . . . . 80 16 ld wide soic package . . . . . . . . . . . . . . . . . . . 100 16 ld narrow soic package. . . . . . . . . . . . . . . . . . 115 18 ld soic package . . . . . . . . . . . . . . . . . . . . . . . . 75 28 ld soic package . . . . . . . . . . . . . . . . . . . . . . . . 75 16 ld ssop package . . . . . . . . . . . . . . . . . . . . . . . 135 20 ld ssop package . . . . . . . . . . . . . . . . . . . . . . . 122 16 ld tssop package . . . . . . . . . . . . . . . . . . . . . . 145 20 ld tssop package . . . . . . . . . . . . . . . . . . . . . . 140 28 ld ssop and tssop packages . . . . . . . . . . . . 100 maximum junction temperature (plastic package) . . . . . . . 150c maximum storage temperature range . . . . . . . . . . . -65c to 150c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300c (soic, ssop, tssop - lead tips only) caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. note: 3. ja is measured with the component mounted on a low effective therma l conductivity test board in free air. see tech brief tb379 fo r details. electrical specifications test conditions: v cc = 3v to 5.5v, c 1 - c 4 = 0.1f; unless otherwise specified. typicals are at t a = 25c parameter test conditions temp (c) min typ max units dc characteristics supply current, automatic powerdown all r in open, forceon = gnd, forceoff = v cc (icl3221e, icl3223e, icl3243e only) 25 - 1.0 10 a supply current, powerdown forceoff = shdn = gnd (except icl3232e) 25 - 1.0 10 a supply current, automatic powerdown disabled all outputs unloaded, forceon = forceoff = shdn = v cc v cc = 3.0v, icl3241, icl3243 25 - 0.3 1.0 ma v cc = 3.15v, icl3221, icl3222, icl3223, icl3232 25 - 0.3 1.0 ma logic and transmitter inputs and receiver outputs input logic threshold low t in , forceon, forceoff , en , shdn full - - 0.8 v input logic threshold high t in , forceon, forceoff , en , shdn v cc = 3.3v full 2.0 - - v v cc = 5.0v full 2.4 - - v input leakage current t in , forceon, forceoff , en , shdn full - 0.01 1.0 a output leakage current (except icl3232e) forceoff = gnd or en = v cc full - 0.05 10 a output voltage low i out = 1.6ma full - - 0.4 v output voltage high i out = -1.0ma full v cc -0.6 v cc -0.1 - v automatic powerdown (icl3221e, icl3223e, icl3243e only, forceon = gnd, forceoff = v cc ) receiver input thresholds to enable transmitters icl32xxe powers up (see figure 6) full -2.7 - 2.7 v receiver input thresholds to disable transmitters icl32xxe powers down (see figure 6) full -0.3 - 0.3 v invalid output voltage low i out = 1.6ma full - - 0.4 v invalid output voltage high i out = -1.0ma full v cc -0.6 - - v icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
9 fn4910.18 march 8, 2005 receiver threshold to transmitters enabled delay (t wu ) 25 - 100 - s receiver positive or negative threshold to invalid high delay (t invh ) 25 - 1 - s receiver positive or negative threshold to invalid low delay (t invl ) 25 - 30 - s receiver inputs input voltage range 25 -25 - 25 v input threshold low v cc = 3.3v 25 0.6 1.2 - v v cc = 5.0v 25 0.8 1.5 - v input threshold high v cc = 3.3v 25 - 1.5 2.4 v v cc = 5.0v 25 - 1.8 2.4 v input hysteresis 25 - 0.5 - v input resistance 25 3 5 7 k ? transmitter outputs output voltage swing all transmitter outputs loaded with 3k ? to ground full 5.0 5.4 - v output resistance v cc = v+ = v- = 0v, transmitter output = 2v full 300 10m - ? output short-circuit current full - 35 60 ma output leakage current v out = 12v, v cc = 0v or 3v to 5.5v, automatic powerdown or forceoff = shdn = gnd full - - 25 a mouse driveability (icl324xe only) transmitter output voltage (see figure 9) t1 in = t2 in = gnd, t3 in = v cc , t3 out loaded with 3k ? to gnd, t1 out and t2 out loaded with 2.5ma each full 5- -v timing characteristics maximum data rate r l = 3k ?, c l = 1000pf, one transmitter switching full 250 500 - kbps receiver propagation delay receiver input to receiver output, c l = 150pf t phl 25 - 0.15 - s t plh 25 - 0.15 - s receiver output enable time normal operation (except icl3232e) 25 - 200 - ns receiver output disable time normal operation (except icl3232e) 25 - 200 - ns transmitter skew t phl - t plh (note 4) 25 - 100 - ns receiver skew t phl - t plh 25 - 50 - ns transition region slew rate v cc = 3.3v, r l = 3k ? to 7k ?, measured from 3v to -3v or -3v to 3v c l = 150pf to 2500pf 25 4 - 30 v/ s c l = 150pf to 1000pf 25 6 - 30 v/ s esd performance rs-232 pins (t out , r in ) human body model 25 - 15 - kv iec61000-4-2 contact discharge 25 - 8-kv iec61000-4-2 air gap discharge 25 - 15 - kv all other pins human body model 25 - 2-kv note: 4. transmitter skew is measured at the transmitter zero crossing points. electrical specifications test conditions: v cc = 3v to 5.5v, c 1 - c 4 = 0.1f; unless otherwise specified. typicals are at t a = 25c (continued) parameter test conditions temp (c) min typ max units icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
10 fn4910.18 march 8, 2005 detailed description icl32xxe interface ics operate fr om a single +3v to +5.5v supply, guarantee a 250kbps minimum data rate, require only four small external 0.1 f capacitors, feature low power consumption, and meet a ll ela rs-232c and v.28 specifications. the circuit is divided into three sections: charge pump, transmitters and receivers. charge-pump intersil?s new icl32xxe family utilizes regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate 5.5v transmitter supplies from a v cc supply as low as 3.0v. this allows these devices to maintain rs-232 compliant output levels over the 10% tolerance range of 3.3v powered systems. the efficient on-chip power supplies require only four small, external 0.1 f capacitors for the voltage doubler and inverter functions at v cc = 3.3v. see the ?capacitor selection? section, and table 3 for capacitor recommendations for other operating conditions. the charge pumps operate discontinuously (i.e., they turn off as soon as the v+ and v- supplies are pumped up to the nominal values), resulting in significant power savings. transmitters the transmitters are proprietary, low dropout, inverting drivers that translate ttl/cm os inputs to eia/tia-232 output levels. coupled with the on-chip 5.5v supplies, these transmitters deliver tr ue rs-232 levels over a wide range of single supply system voltages. except for the icl3232e, all transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode (see table 2). these outputs may be driven to 12v when disabled. all devices guarantee a 250kbps data rate for full load conditions (3k ? and 1000pf), v cc 3.0v, with one transmitter operating at full speed. under more typical conditions of v cc 3.3v, r l = 3k ? , and c l = 250pf, one transmitter easily operates at 900kbps. transmitter inputs float if left unconnected, and may cause i cc increases. connect unused inputs to gnd for the best performance. receivers all the icl32xxe devices co ntain standard inverting receivers that three-state (except for the icl3232e) via the en or forceoff control lines. additionally, the two icl324xe products include noninverting (monitor) receivers (denoted by the r outb label) that are always active, regardless of the state of any control lines. all the receivers convert rs-232 signals to cmos output levels and accept inputs up to 25v while presenting the required 3k ? to 7k ? input impedance (see figure 1) even if the power is off (v cc = 0v). the receivers? schmitt trigger input stage uses hysteresis to increase noise im munity and decrease errors due to slow input signal transitions. the icl3221e, icl3222e, icl3223e, icl3241e inverting receivers disable only when en is driven high. icl3243e receivers disable during forced (manual) powerdown, but not during automatic powerdown (see table 2). icl3241e and icl3243e monitor receivers remain active even during manual powerdown and forced receiver disable, making them extremely useful for ring indicator monitoring. standard receivers driving powered down peripherals must be disabled to prevent current flow through the peripheral?s protection diodes (see figures 2 and 3). this renders them useless for wake up functions, but the corresponding monitor receiver can be dedicated to this task as shown in figure 3. low power operation these 3v devices require a nominal supply current of 0.3ma, even at v cc = 5.5v, during normal operation (not in powerdown mode). this is considerably less than the 5ma to 11ma current required by comparable 5v rs-232 devices, allowing users to reduce system power simply by switching to this new family. pin compatible replacements for 5v devices the icl3221e, icl3222e, icl3232e are pin compatible with existing 5v rs-232 transceivers - see the features section on the front page for details. this pin compatibility coupled with the low i cc and wide operating supply range, make the icl32xxe potential lower power, higher performance drop-in replacements for existing 5v applications. as long as the 5v rs-232 output swings are acceptable, and transmitter input pull-up resistors aren?t required, the iicl32xxe shou ld work in most 5v applications. when replacing a device in an existing 5v application, it is acceptable to terminate c 3 to v cc as shown on the typical operating circuit . nevertheless, terminate c 3 to gnd if possible, as slightly better performance results from this configuration. powerdown functionality (except icl3232e) the already low current requi rement drops significantly when the device enters powerdown mode. in powerdown, supply current drops to 1a, because the on-chip charge pump turns off (v+ collapses to v cc , v- collapses to gnd), and the transmitter outputs three-state. inverting receiver outputs may or may not disable in powerdown; refer to table 2 for details. this micro-power mode makes these devices ideal for battery powered and portable applications. r xout gnd v rout v cc 5k ? r xin -25v v rin +25v gnd v cc figure 1. inverting receiver connections icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
11 fn4910.18 march 8, 2005 software controlled (manual) powerdown most devices in the icl32xxe family provid e pins that allow the user to force the ic into the low power, standby state. on the icl3222e and icl3241e, the powerdown control is via a simple shutdown (shdn ) pin. driving this pin high enables normal operation, while driving it low forces the ic into its powerdown state. connect shdn to v cc if the powerdown function isn?t needed. note that all the receiver outputs remain enabled during shutdown (see table 2). for the lowest power consumption during powerdown, the receivers should also be disabled by driving the en input high (see next section, and figures 2 and 3). the icl3221e, icl3223e, and icl3243e utilize a two pin approach where the forceon and forceoff inputs determine the ic?s mode. for always enabled operation, forceon and forceoff are both strapped high. to switch between active and powerdown modes, under logic or software control, only the forceoff input need be driven. the forceon state isn?t critical, as forceoff dominates over forceon. nevert heless, if strictly manual control over powerdown is des ired, the user must strap forceon high to disable the automatic powerdown circuitry. icl3243e inverting (standard) receiver outputs also disable when the device is in manual powerdown, thereby eliminating the possible current path through a shutdown peripheral?s input protection diode (see figures 2 and 3). table 2. powerdown and enable logic truth table rs-232 signal present at receiver input? forceoff or shdn input forceon input en input transmitter outputs receiver outputs (note 5) r outb outputs invalid output mode of operation icl3222e, icl3241e n/a l n/a l high-z active active n/a manual powerdown n/a l n/a h high-z high-z active n/a manual powerdown w/rcvr. disabled n/a h n/a l active active active n/a normal operation n/a h n/a h active high-z active n/a norm al operation w/rcvr. disabled icl3221e, icl3223e no h h l active active n/a l normal operation (auto powerdown disabled) no h h h active high-z n/a l yes h l l active active n/a h normal operation (auto powerdown enabled) yes h l h active high-z n/a h no h l l high-z active n/a l powerdown due to auto powerdown logic no h l h high-z high-z n/a l yes l x l high-z active n/a h manual powerdown yes l x h high-z high-z n/a h manual powerdown w/rcvr. disabled no l x l high-z active n/a l manual powerdown no l x h high-z high-z n/a l manual powerdown w/rcvr. disabled icl3243e no h h n/a active active active l normal operation (auto powerdown disabled) yes h l n/a active active active h normal operation (auto powerdown enabled) no h l n/a high-z active active l powerdown due to auto powerdown logic yes l x n/a high-z high-z active h manual powerdown no l x n/a high-z high-z active l manual powerdown note: 5. applies only to the icl3241e and icl3243e. icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
12 fn4910.18 march 8, 2005 the invalid output always indicates whether or not a valid rs-232 signal is present at any of the receiver inputs (see table 2), giving the user an easy way to determine when the interface block should power down. in the case of a disconnected interface cable where all the receiver inputs are floating (but pulled to gnd by the internal receiver pull down resistors), the invalid logic detects the invalid levels and drives the output low. the power management logic then uses this indicator to power down the interface block. reconnecting the cable restores valid levels at the receiver inputs, invalid switches high, and the power management logic wakes up the interface block. invalid can also be used to indicate the dtr or ring indicator signal, as long as the other receiver inputs are floating, or driven to gnd (as in the case of a powered down driver). connecting forceoff and forceon together disables the automatic powerdown feature, en abling them to function as a manual shutdown input (see figure 4). with any of the above control schemes, the time required to exit powerdown, and resume transmission is only 100s. a mouse, or other application, may need more time to wake up from shutdown. if automatic powerdown is being utilized, the rs-232 device will reenter powerdown if valid receiver levels aren?t reestablished within 30s of the icl32xxe powering up. figure 5 illustrates a circ uit that keep s the icl32xxe from initiating automatic powerdown for 100ms after powering up. this gives the slow-to-wake peripheral circuit time to reestablish valid rs-232 output levels. automatic powerdown (icl3221e, icl3223e, icl3243e only) even greater power savings is available by using the devices which feature an automatic powerdown function. when no valid rs-232 voltages (see figure 6) are sensed on any receiver input for 30s, the charge pump and transmitters powerdown, ther eby reducing supply current to 1a. invalid receiver levels occur whenever the driving peripheral?s outputs are shut off (powered down) or when the rs-232 interface cable is disconnected. the icl32xxe powers back up whenever it detects a valid rs-232 voltage level on any receiver input. this automatic powerdown figure 2. power drain through powered down peripheral old v cc powered gnd shdn = gnd v cc rx tx v cc current v out = v cc flow rs-232 chip down uart figure 3. disabled receivers prevent power drain icl324xe transition r x t x r2 outb r2 out t1 in forceoff = gnd v cc v cc to r2 in t1 out v out = hi-z powered or shdn = gnd, en = v cc detector down uart wake-up logic figure 4. connections for manual powerdown when no valid receiver signals are present pwr forceoff invalid cpu i/o forceon icl3221e, mgt logic uart icl3243e icl3223e, figure 5. circuit to prevent auto powerdown for 100ms after forced powerup icl3221e, icl3223e, icl3243e forceoff forceon power master powerdown line 1m ? 0.1f management unit icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
13 fn4910.18 march 8, 2005 feature provides a dditional system powe r savings without changes to the existing operating system. automatic powerdown operates when the forceon input is low, and the forceoff input is high. tying forceon high disables automatic powerdown, but manual powerdown is always available via the overriding forceoff input. table 2 summarizes the automatic powerdown functionality. devices with the automatic powerdown feature include an invalid output signal, which switches low to indicate that invalid levels have persisted on all of the receiver inputs for more than 30s (see figure 7). invalid switches high 1s after detecting a valid rs-232 level on a receiver input. invalid operates in all modes (forced or automatic powerdown, or forced on), so it is also useful for systems employing manual powerdown circuitry. when automatic powerdown is utilized, invalid = 0 indicates that the icl32xxe is in powerdown mode. the time to recover from automatic powerdown mode is typically 100s. receiver enable control (icl3221e, icl3222e, icl3223e, icl3241e only) several devices also feature an en input to control the receiver outputs. driving en high disables all the inverting (standard) receiver outputs placing them in a high impedance state. this is useful to eliminate supply current, due to a receiver output forwar d biasing the protection diode, when driving the input of a powered down (v cc = gnd) peripheral (see figure 2). the enable input has no effect on transmitter nor monitor (r outb ) outputs. capacitor selection the charge pumps require 0.1f capacitors for 3.3v operation. for other supply voltages refer to table 3 for capacitor values. do not use values smaller than those listed in table 3. increasing the capaci tor values (by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. c 2 , c 3 , and c 4 can be increased without increasing c 1 ?s value, however, do not increase c 1 without also increasing c 2 , c 3 , and c 4 to maintain the proper ratios (c 1 to the other capacitors). when using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. if in doubt, use ca pacitors with a larger nominal value. the capacitor?s equivalent series resistance (esr) usually rises at low temperat ures and it influences the amount of ripple on v+ and v-. power supply decoupling in most circumstances a 0.1f bypass capacitor is adequate. in applications that are particularly sensitive to power supply noise, decouple v cc to ground with a capacitor of the same value as the charge-pump capacitor c 1 . connect the bypass capacitor as close as possible to the ic. operation down to 2.7v icl32xxe transmitter outputs meet rs-562 levels ( 3.7v), at full data rate, with v cc as low as 2.7v. rs-562 levels typically ensure interoperability with rs-232 devices. transmitter outputs when exiting powerdown figure 8 shows the response of two transmitter outputs when exiting powerdown mode. as they activate, the two transmitter outputs properly go to opposite rs-232 levels, with no glitching, ringing, nor undesirable transients. each figure 6. definition of valid rs-232 receiver levels 0.3v -0.3v -2.7v 2.7v invalid level - powerdown occurs after 30s valid rs-232 level - icl32xxe is active valid rs-232 level - icl32xxe is active indeterminate - powerdown may or indeterminate - powerdown may or may not occur may not occur receiver inputs transmitter outputs invalid output v+ v cc 0 v- v cc 0 t invl t invh invalid region } figure 7. automatic powerdown and invalid timing diagrams autopwdn pwr up table 3. required capacitor values v cc (v) c 1 (f) c 2 , c 3 , c 4 (f) 3.0 to 3.6 0.1 0.1 4.5 to 5.5 0.047 0.33 3.0 to 5.5 0.1 0.47 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
14 fn4910.18 march 8, 2005 transmitter is loaded with 3k ? in parallel with 2500pf. note that the transmitters enable only when the magnitude of the supplies exceed approximately 3v. mouse driveability the icl3241e and icl3243e have been specifically designed to power a serial mouse while operating from low voltage supplies. figure 9 shows the transmitter output voltages under increasing load current. the on-chip switching regulator ensures the transmitters will supply at least 5v during worst case conditions (15ma for paralleled v+ transmitters, 7.3ma for single v- transmitter). the automatic powerdown feature does not work with a mouse, so forceoff and forceon should be connected to v cc . high data rates the icl32xxe maintain the rs-232 5v minimum transmitter output voltages even at high data rates. figure 10 details a transmitter loopback test circuit, and figure 11 illustrates the loopback test result at 120kbps. for this test, all transmitters were simultaneously driving rs-232 loads in parallel with 1000pf, at 120kbps. figure 12 shows the loopback results for a single transmitter driving 1000pf and an rs-232 load at 250kbps. the static transmitters were also loaded with an rs-232 receiver. time (20s/div) t1 t2 2v/div 5v/div v cc = +3.3v forceoff figure 8. transmitter outputs when exiting powerdown c1 - c4 = 0.1f figure 9. transmitter output voltage vs load current (per transmitter, i.e., double current axis for total v out+ current) transmitter output voltage (v) load current per transmitter (ma) 0246810 -6 -4 -2 0 2 4 6 -5 -3 -1 1 3 5 13579 v out + v out - v cc v out + v out - t1 t2 t3 v cc = 3.0v icl3241e, icl3243e figure 10. transmitter loopback test circuit figure 11. loopback test at 120kbps figure 12. loopback test at 250kbps icl32xxe v cc forceoff c 1 c 2 c 4 c 3 + + + + 1000pf v+ v- 5k t in r out c1+ c1- c2+ c2- r in t out + v cc 0.1f v cc en shdn or t1 in t1 out r1 out 5s/div v cc = +3.3v 5v/div c1 - c4 = 0.1f t1 in t1 out r1 out 2s/div 5v/div v cc = +3.3v c1 - c4 = 0.1f icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
15 fn4910.18 march 8, 2005 interconnection with 3v and 5v logic the icl32xx directly interface with 5v cmos and ttl logic families. nevertheless, with the icl32xx at 3.3v, and the logic supply at 5v, ac, hc, and cd4 000 outputs can drive icl32xx inputs, but icl32xx outputs do not reach the minimum v ih for these logic families. see table 4 for more information. 15kv esd protection all pins on icl32xx devices include esd protection structures, but the icl32xxe fa mily incorporates advanced structures which allow the rs-232 pins (transmitter outputs and receiver inputs) to survive esd events up to 15kv. the rs-232 pins are particularly vulnerable to esd damage because they typically connect to an exposed port on the exterior of the finished pro duct. simply touching the port pins, or connecting a cable, can cause an esd event that might destroy unprotected ics. these new esd structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and don?t interfere with rs-232 signals as large as 25v. human body mode l (hbm) testing as the name implies, this test method emulates the esd event delivered to an ic during human handling. the tester delivers the charge through a 1.5k ? current limiting resistor, making the test less severe than the iec61000 test which utilizes a 330 ? limiting resistor. the hbm method determines an ic?s ability to withstand the esd transients typically present during handling and manufacturing. due to the random nature of these events, each pin is tested with respect to all other pins. the rs-232 pins on ?e? family devices can withstand hbm esd events to 15kv. iec61000-4-2 testing the iec61000 test method applies to finished equipment, rather than to an individual ic. therefore, the pins most likely to suffer an esd event are t hose that are ex posed to the outside world (the rs-232 pins in this case), and the ic is tested in its typical application configuration (power applied) rather than testing each pin-to -pin combination. the lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the hbm test. the extra esd protection built into this device?s rs-232 pins allows the design of equipment meeting level 4 criteria with out the need for additional board level protection on the rs-232 port. air-gap discharge test method for this test method, a charged probe tip moves toward the ic pin until the voltage arcs to it. the current waveform delivered to the ic pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. the ?e? device rs-232 pins withstand 15kv air-gap discharges. contact discharge test method during the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. the result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than 8kv. all ?e? family devices survive 8kv contact discharges on the rs-232 pins. table 4. logic family compatibility with various supply voltages system power- supply voltage (v) v cc supply voltage (v) compatibility 3.3 3.3 compatible with all cmos families. 5 5 compatible with all ttl and cmos logic families. 5 3.3 compatible with act and hct cmos, and with ttl. icl32xx outputs are incompatible with ac, hc, and cd4000 cmos inputs. typical performance curves v cc = 3.3v, t a = 25c figure 13. transmitter output voltage vs load capacitance figure 14. slew rate vs load capacitance -6 -4 -2 0 2 4 6 1000 2000 3000 4000 5000 0 load capacitance (pf) transmitter output voltage (v) 1 transmitter at 250kbps v out + v out - 1 or 2 transmitters at 30kbps load capacitance (pf) slew rate (v/ms) 0 1000 2000 3000 4000 5000 5 10 15 20 25 +slew -slew icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
16 fn4910.18 march 8, 2005 die characteristics substrate potential (powered up): gnd transistor count: icl3221e: 286 icl3222e: 338 icl3223e: 357 icl3232e: 296 icl324xe: 464 process: si gate cmos figure 15. supply current vs load capacitance when transmitting data figure 16. supply current vs load capacitance when transmitting data figure 17. supply current vs load capacitance when transmitting data figure 18. supply current vs supply voltage typical performance curves v cc = 3.3v, t a = 25c (continued) 0 5 10 15 20 25 30 45 35 40 0 1000 2000 3000 4000 5000 load capacitance (pf) supply current (ma) 20kbps 250kbps 120kbps icl3221e 0 5 10 15 20 25 30 45 35 40 0 1000 2000 3000 4000 5000 load capacitance (pf) supply current (ma) 20kbps 250kbps 120kbps icl3222e, icl3223e, icl3232e 10 15 20 25 30 45 35 40 0 1000 2000 3000 4000 5000 load capacitance (pf) supply current (ma) 20kbps 250kbps 120kbps icl324xe supply current (ma) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0 0.5 1.0 1.5 2.0 supply voltage (v) 2.5 3.0 3.5 no load all outputs static icl3221e, icl3222e, icl3223e, icl3232e icl324xe icl324xe icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e
17 fn4910.18 march 8, 2005 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e dual-in-line plastic packages (pdip) notes: 1. controlling dimensions: inch. in case of conflict between english and metric dimensions, the in ch dimensions control. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. symbols are defined in the ?mo series symbol list? in section 2.2 of publication no. 95. 4. dimensions a, a1 and l are m easured with the package seated in jedec seating plane gauge gs - 3. 5. d, d1, and e1 dimensions do not include mold flash or protrusions. mold flash or protrusions shal l not exceed 0.010 inch (0.25mm). 6. e and are measured with the leads constrained to be perpendic- ular to datum . 7. e b and e c are measured at the lead tips with the leads unconstrained. e c must be zero or greater. 8. b1 maximum dimensions do not include dambar protrusions. dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. n is the maximum number of terminal positions. 10. corner leads (1, n, n/2 and n/2 + 1) for e8.3, e16.3, e18.3, e28.3 may have a b1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). e a -c- c l e e a c e b e c -b- e1 index 12 3 n/2 n area seating base plane plane -c- d1 b1 b e d d1 a a2 l a1 -a- 0.010 (0.25) c a m bs e18.3 (jedec ms-001-bc issue d) 18 lead dual-in-line plastic package symbol inches millimeters notes min max min max a - 0.210 - 5.33 4 a1 0.015 - 0.39 - 4 a2 0.115 0.195 2.93 4.95 - b 0.014 0.022 0.356 0.558 - b1 0.045 0.070 1.15 1.77 8, 10 c 0.008 0.014 0.204 0.355 - d 0.845 0.880 21.47 22.35 5 d1 0.005 - 0.13 - 5 e 0.300 0.325 7.62 8.25 6 e1 0.240 0.280 6.10 7.11 5 e 0.100 bsc 2.54 bsc - e a 0.300 bsc 7.62 bsc 6 e b - 0.430 - 10.92 7 l 0.115 0.150 2.93 3.81 4 n18 189 rev. 2 11/03
18 fn4910.18 march 8, 2005 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e small outline plast ic packages (soic) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include interlead flash or protrusions. in- terlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. controlling dimension: millimeter. converted inch dimen- sions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m b s e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 o c h 0.25(0.010) b m m m16.15 (jedec ms-012-ac issue c) 16 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.053 0.069 1.35 1.75 - a1 0.004 0.010 0.10 0.25 - b 0.014 0.019 0.35 0.49 9 c 0.007 0.010 0.19 0.25 - d 0.386 0.394 9.80 10.00 3 e 0.150 0.157 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.228 0.244 5.80 6.20 - h 0.010 0.020 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n16 167 0 o 8 o 0 o 8 o - rev. 1 02/02
19 fn4910.18 march 8, 2005 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e thin shrink small outlin e plastic packages (tssop) notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-153-ab, issue e. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not includ e interlead flash or protrusions. interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimension at maximum ma terial condition. minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. controlling dimension: millimeter. converted inch dimen- sions are not necessarily exact. (angles in degrees) index area e1 d n 123 -b- 0.10(0.004) c a m bs e -a- b m -c- a1 a seating plane 0.10(0.004) c e 0.25(0.010) b m m l 0.25 0.010 gauge plane a2 0.05(0.002) m16.173 16 lead thin shrink small outline plastic package symbol inches millimeters notes min max min max a- 0.043 - 1.10 - a1 0.002 0.006 0.05 0.15 - a2 0.033 0.037 0.85 0.95 - b 0.0075 0.012 0.19 0.30 9 c 0.0035 0.008 0.09 0.20 - d 0.193 0.201 4.90 5.10 3 e1 0.169 0.177 4.30 4.50 4 e 0.026 bsc 0.65 bsc - e 0.246 0.256 6.25 6.50 - l 0.020 0.028 0.50 0.70 6 n16 167 0 o 8 o 0 o 8 o - rev. 1 2/02
20 fn4910.18 march 8, 2005 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e small outline plast ic packages (ssop) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate bur rs shall not exceed 0.20mm (0.0078 inch) per side. 4. dimension ?e? does not include interl ead flash or protrusions. interlead flash and protrusions shall not exce ed 0.20mm (0.0078 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dam bar protrusion. allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of ?b? dimen- sion at maximum material condition. 10. controlling dimension: millimeter. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) c h 0.25(0.010) b m m 0.25 0.010 gauge plane a2 m16.209 (jedec mo-150-ac issue b) 16 lead shrink small outline plastic package symbol inches millimeters notes min max min max a- 0.078 - 2.00 - a1 0.002 - 0.05 -- a2 0.065 0.072 1.65 1.85 - b 0.009 0.014 0.22 0.38 9 c 0.004 0.009 0.09 0.25 - d 0.233 0.255 5.90 6.50 3 e 0.197 0.220 5.00 5.60 4 e 0.026 bsc 0.65 bsc - h 0.292 0.322 7.40 8.20 - l 0.022 0.037 0.55 0.95 6 n16 167 0 o 8 o 0 o 8 o - rev. 2 3/95
21 fn4910.18 march 8, 2005 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e small outline plast ic packages (soic) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include inte rlead flash or protrusions. interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. controlling dimension: millimeter. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 o c h 0.25(0.010) b m m m16.3 (jedec ms-013-aa issue c) 16 lead wide body small outline plastic package symbol inches millimeters notes min max min max a 0.0926 0.1043 2.35 2.65 - a1 0.0040 0.0118 0.10 0.30 - b 0.013 0.0200 0.33 0.51 9 c 0.0091 0.0125 0.23 0.32 - d 0.3977 0.4133 10.10 10.50 3 e 0.2914 0.2992 7.40 7.60 4 e 0.050 bsc 1.27 bsc - h 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 l 0.016 0.050 0.40 1.27 6 n16 167 0 o 8 o 0 o 8 o - rev. 0 12/93
22 fn4910.18 march 8, 2005 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e small outline plast ic packages (soic) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include interl ead flash or protrusions. interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. controlling dimension: millimeter . converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 o c h 0.25(0.010) b m m m18.3 (jedec ms-013-ab issue c) 18 lead wide body small outline plastic package symbol inches millimeters notes min max min max a 0.0926 0.1043 2.35 2.65 - a1 0.0040 0.0118 0.10 0.30 - b 0.013 0.0200 0.33 0.51 9 c 0.0091 0.0125 0.23 0.32 - d 0.4469 0.4625 11.35 11.75 3 e 0.2914 0.2992 7.40 7.60 4 e 0.050 bsc 1.27 bsc - h 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 l 0.016 0.050 0.40 1.27 6 n18 187 0 o 8 o 0 o 8 o - rev. 0 12/93
23 fn4910.18 march 8, 2005 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e thin shrink small outlin e plastic packages (tssop) index area e1 d n 123 -b- 0.10(0.004) c a m bs e -a- b m -c- a1 a seating plane 0.10(0.004) c e 0.25(0.010) b m m l 0.25 0.010 gauge plane a2 notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-153-ac, issue e. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not include in terlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dam bar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimen- sion at maximum material condition. minimum space between protru- sion and adjacent lead is 0.07mm (0.0027 inch). 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. (angles in degrees) 0.05(0.002) m20.173 20 lead thin shrink small outline plastic package symbol inches millimeters notes min max min max a- 0.047 - 1.20 - a1 0.002 0.006 0.05 0.15 - a2 0.031 0.051 0.80 1.05 - b 0.0075 0.0118 0.19 0.30 9 c 0.0035 0.0079 0.09 0.20 - d 0.252 0.260 6.40 6.60 3 e1 0.169 0.177 4.30 4.50 4 e 0.026 bsc 0.65 bsc - e 0.246 0.256 6.25 6.50 - l 0.0177 0.0295 0.45 0.75 6 n20 207 0 o 8 o 0 o 8 o - rev. 1 6/98
24 fn4910.18 march 8, 2005 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e shrink small outline plastic packages (ssop) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. dimension ?e? does not include interlead flash or protrusions. in- terlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of ?b? dimension at maximum material condition. 10. controlling dimension: millimeter. converted inch dimen- sions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m b s e -a- b m -c- a1 a seating plane 0.10(0.004) c h 0.25(0.010) b m m l 0.25 0.010 gauge plane a2 m20.209 (jedec mo-150-ae issue b) 20 lead shrink small outline plastic package symbol inches millimeters notes min max min max a 0.068 0.078 1.73 1.99 a1 0.002 0.008? 0.05 0.21 a2 0.066 0.070? 1.68 1.78 b 0.010? 0.015 0.25 0.38 9 c 0.004 0.008 0.09 0.20? d 0.278 0.289 7.07 7.33 3 e 0.205 0.212 5.20? 5.38 4 e 0.026 bsc 0.65 bsc h 0.301 0.311 7.65 7.90? l 0.025 0.037 0.63 0.95 6 n20 207 0 deg. 8 deg. 0 deg. 8 deg. rev. 3 11/02
25 fn4910.18 march 8, 2005 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e thin shrink small outlin e plastic packages (tssop) index area e1 d n 123 -b- 0.10(0.004) c a m bs e -a- b m -c- a1 a seating plane 0.10(0.004) c e 0.25(0.010) b m m l 0.25 0.010 gauge plane a2 notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-153-ae, issue e. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not include in terlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dam bar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimen- sion at maximum material condition. minimum space between protru- sion and adjacent lead is 0.07mm (0.0027 inch). 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. (angles in degrees) 0.05(0.002) m28.173 28 lead thin shrink small outline plastic package symbol inches millimeters notes min max min max a- 0.047 - 1.20 - a1 0.002 0.006 0.05 0.15 - a2 0.031 0.051 0.80 1.05 - b 0.0075 0.0118 0.19 0.30 9 c 0.0035 0.0079 0.09 0.20 - d 0.378 0.386 9.60 9.80 3 e1 0.169 0.177 4.30 4.50 4 e 0.026 bsc 0.65 bsc - e 0.246 0.256 6.25 6.50 - l 0.0177 0.0295 0.45 0.75 6 n28 287 0 o 8 o 0 o 8 o - rev. 0 6/98
26 fn4910.18 march 8, 2005 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e shrink small outline plastic packages (ssop) notes: 1. symbols are defined in the ?mo seri es symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mo ld flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. dimension ?e? does not include inte rlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual in- dex feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dam bar protrusion. allowable dam- bar protrusion shall be 0.13mm (0.005 inch) total in excess of ?b? dimension at maximum material condition. 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) c h 0.25(0.010) b m m 0.25 0.010 gauge plane a2 m28.209 (jedec mo-150-ah issue b) 28 lead shrink small outline plastic package symbol inches millimeters notes min max min max a- 0.078 - 2.00 - a1 0.002 - 0.05 -- a2 0.065 0.072 1.65 1.85 - b 0.009 0.014 0.22 0.38 9 c 0.004 0.009 0.09 0.25 - d 0.390 0.413 9.90 10.50 3 e 0.197 0.220 5.00 5.60 4 e 0.026 bsc 0.65 bsc - h 0.292 0.322 7.40 8.20 - l 0.022 0.037 0.55 0.95 6 n28 287 0 o 8 o 0 o 8 o - rev. 1 3/95
27 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn4910.18 march 8, 2005 icl3221e, icl3222e, icl3223e , icl3232e, icl3241e, icl3243e small outline plast ic packages (soic) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mo ld flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include in terlead flash or protrusions. in- terlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional . if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. controlling dimension: millimeter. converted inch dimen- sions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 o c h 0.25(0.010) b m m m28.3 (jedec ms-013-ae issue c ) 28 lead wide body small outline plastic package symbol inches millimeters notes min max min max a 0.0926 0.1043 2.35 2.65 - a1 0.0040 0.0118 0.10 0.30 - b 0.013 0.0200 0.33 0.51 9 c 0.0091 0.0125 0.23 0.32 - d 0.6969 0.7125 17.70 18.10 3 e 0.2914 0.2992 7.40 7.60 4 e 0.05 bsc 1.27 bsc - h 0.394 0.419 10.00 10.65 - h 0.01 0.029 0.25 0.75 5 l 0.016 0.050 0.40 1.27 6 n28 287 0 o 8 o 0 o 8 o - rev. 0 12/93

▲Up To Search▲

Price & Availability of ICL3232EIV-16Z-T

	To Download ICL3232EIV-16Z-T Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .